/**
******************************************************************************
* @File:
* @Author:	Ares
* @Revision:
* @Date:
* @Brief:	network module serial port
******************************************************************************
* @attention
*
******************************************************************************
*/
#include "dev.h"
#include "sys.h"

u8	U2_CACHE_LOCK=0;
u8	U2_RCACHE[U2_RMAX]={0};
u8	U2_DUMP[U2_RMAX]={0};
u8	U2_PROC[U2_RMAX]={0};
u16	U2_RLEN=0;

int	U2_PROC_LOCK=0; //0:idle  1:busy

int u2_proc_lock(void)
{
	if(U2_PROC_LOCK==0)
	{
		U2_PROC_LOCK=1;
		return 1;
	}
	else
	{
		Log("proc already lock!\r\n");
		return 0;
	}
}

void u2_proc_unlock(void)
{
	U2_PROC_LOCK=0;
}

int u2_proc_state(void)
{
	return U2_PROC_LOCK;
}

int usart2_cache_lock(void)
{
	memset(U2_DUMP,0,U2_RMAX);
	if(U2_CACHE_LOCK==0)
	{
		U2_CACHE_LOCK=1;
		return 1; //get lock;
	}
	else
	{
		Log("cache already lock")
		return 0;	//already lock
	}
}

void usart2_cache_unlock(void)
{
	memset(U2_DUMP,0,U2_RMAX);
	U2_CACHE_LOCK=0;
}

void usart2_sendbyte(u8 ch)
{
	USART_SendData(USART2,ch);
	while(USART_GetFlagStatus(USART2, USART_FLAG_TXE)==RESET);
}

void usart2_sendstring(u8 *str,u16 len)
{
	for(u16 i=0;i<len;i++)
	{
		usart2_sendbyte(str[i]);
	}
	//Log("cmd[%s]\r\n",str);
}


void USART2_IRQHandler(void)	
{
	u16 i;
 	if(USART_GetITStatus(USART2, USART_IT_IDLE) != RESET)
	{	
		if(!U2_CACHE_LOCK)
		{
			memset(U2_DUMP,0,U2_RMAX);
		}
		//memset(U2_RCACHE,0,U2_RMAX);
		DMA_Cmd(DMA1_Channel6, DISABLE);//??DMA,?????????
		U2_RLEN=U2_RMAX-DMA_GetCurrDataCounter(DMA1_Channel6);

		//DMA_ClearFlag(DMA1_FLAG_GL3 | DMA1_FLAG_TC3 | DMA1_FLAG_TE3 | DMA1_FLAG_HT3);//???
		DMA1_Channel6->CNDTR = U2_RMAX;//???	
		//DMA_SetCurrDataCounter(DMA1_Channel3,USART3_RX_MAX); 
		DMA_Cmd(DMA1_Channel6, ENABLE);//???,??DMA

		if(!U2_CACHE_LOCK)
		{
			//usart2 cache dump
			for(int i=0;i<U2_RLEN;i++)
			{
				U2_DUMP[i]=U2_RCACHE[i];
			}
		}
		memset(U2_RCACHE,0,U2_RMAX); //reset rcv bytes after cache dump
		//Log("u2 dma[%s]\r\n",uc);
		
		Log("%s\r\n",U2_DUMP);
		gprs_reply_process();
		//clear Idle by read SR/DR register
		i = USART2->SR;
		i = USART2->DR;
	}
	//if(USART_GetITStatus(USART3, USART_IT_PE | USART_IT_FE | USART_IT_NE) != RESET)//??
	{
	//	printf("dma err 33!!!!!!!!!!!!!!!!!!\r\n");
	//	USART_ClearITPendingBit(USART3, USART_IT_PE | USART_IT_FE | USART_IT_NE);
	}
	//USART_ClearITPendingBit(USART3, USART_IT_IDLE);
}

void usart2_dma_init(void)
{
	DMA_InitTypeDef DMA_InitStructure;
	RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);

	USART_DMACmd(USART2, USART_DMAReq_Rx, ENABLE);
	
	DMA_DeInit(DMA1_Channel6);
	DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART2->DR;
	DMA_InitStructure.DMA_MemoryBaseAddr=(u32)U2_RCACHE;
	DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
	DMA_InitStructure.DMA_BufferSize=U2_RMAX;
	DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
	DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
	DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
	DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;

	DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;  
	DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
	DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
	DMA_Init(DMA1_Channel6,&DMA_InitStructure);  

	DMA_Cmd(DMA1_Channel6,ENABLE);
}

void usart2_init(u32 bound)
{
	USART_InitTypeDef	USART_InitStructure;
	NVIC_InitTypeDef	NVIC_InitStructure;
	
	USART_DeInit(USART2);
	
	NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
	NVIC_Init(&NVIC_InitStructure);
	
	USART_InitStructure.USART_BaudRate = bound;
	USART_InitStructure.USART_WordLength = USART_WordLength_8b;
	USART_InitStructure.USART_StopBits = USART_StopBits_1;
	USART_InitStructure.USART_Parity = USART_Parity_No;
	USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
	USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;

	USART_Init(USART2, &USART_InitStructure);
	//USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
	USART_ITConfig(USART2, USART_IT_IDLE, ENABLE);
	USART_Cmd(USART2, ENABLE);
	
	usart2_dma_init();
}

